Ground bounce
What is ground bounce and how do you reduce it?
| Level | ● screening |
| Track | Power |
| Really testing | L·di/dt in returns. |
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Say this first: When many outputs switch at once, their return current flows through the package and board inductance in the ground path: V = L·di/dt. The chip's internal "ground" lifts relative to board ground, quiet outputs glitch, and input thresholds shift. Same thing on the power side: power rail droop.
Reduce: more ground pins/balls and vias (parallel inductance), short wide return paths and solid planes, decoupling right at the pins, slower edges or lower drive strength, fewer simultaneous switching outputs, spreading switching in time (staggered/skewed outputs), differential signaling.
Numbers: 1 nH × (10 mA/1 ns) per output × 16 outputs = 160 mV.
Going deeper
How to see it on the bench. Hold one output low and keep it quiet, then switch the others. Probe the quiet output with a short ground spring. The glitch you see on the "stuck-low" pin is the ground bounce inside the package.
Worked example. 16 outputs, each switching 10 mA in 1 ns, through 1 nH of shared ground inductance: 160 mV. Spread the return over four ground balls and the shared inductance is roughly 0.25 nH → about 40 mV.
What helps most, in order. More ground pins and vias near the switching I/O; decoupling at the I/O supply pins; lower drive strength or slew-rate control; staggered switching.
Where people go wrong
- Only looking at ground — the same L·di/dt shows up on the I/O supply as droop.
- Blaming the board when the limit is the package's pin assignment — check the vendor's simultaneous-switching guidelines.
More like this in the book
This is PI-02 from Hardware Engineer Interview Questions. The book has 5 questions on power integrity & protection and 141 in all, each answered the same way: what to say first, how to explain it, the numbers worth quoting and the follow-ups that come next.
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